A lot of open models only run with NVIDIA's libraries or someone else's runtime. We write our own versions so they run on Google TPUs.
71 pieces of outside software replaced so far, 27 of them live in our service.
Code that only runs on NVIDIA hardware, and the jobs NVIDIA's serving software does for a model. 16 replaced so far. Our replacements for CUDA-only 3D libraries ship as Culet 3D.
The sparse transformer stages of Microsoft's TRELLIS.2 run on a TPU without them.
flash-attn and xformers, CUDA-only attention libraries, run the sparse transformer stages of Microsoft's TRELLIS.2 (AniGen and Pixal3D use them too). We replaced them. On one TPU v6e chip, those TRELLIS.2 stages matched the original model. Measured 23 October 2026.
NVIDIA's Audio2Face-3D v3.0 speech-to-face network runs on a TPU v5e chip, with no TensorRT.
NVIDIA's SDK runs its Audio2Face-3D v3.0 model on NVIDIA's TensorRT. We run the network natively on a TPU v5e chip, and it matched the reference output (worst relative error 1.44e-4). Measured 23 October 2026.
Gaussian-splat 3D scenes render on a TPU with our own renderer.
gsplat is the CUDA-only renderer used to draw 3D Gaussian-splat scenes. Our own TPU renderer reproduced its output with a lowest PSNR of 103.9 dB against gsplat 1.5.3, on a TPU v5p. Measured 21 October 2026.
The sparse decoder stages of Microsoft's TRELLIS.2 run on a TPU v6e chip without it.
FlexGEMM, a CUDA-only sparse 3D convolution library, sits inside Microsoft's TRELLIS.2 image-to-3D model (its shape and texture decoders) and Pixal3D. We replaced it with our own code.
The runtimes most teams serve language models with. We wrote Scaife, our own serving engine, and a llama.cpp backend that runs on TPU. 13 replaced so far.
Language models on TPU served by Scaife, our own engine, in place of Google's vLLM-TPU.
Model size: 1.24B parameters
On Llama 3.2 1B with the same weights: 47,895 tokens a second at 256 conversations, 2.10 times Google's vLLM-TPU 0.31 (22,826). Measured 19 October 2026.
Qwen3-30B-A3B at 4-bit on one TPU v6e chip, in our engine.
Model size: 30.5B parameters, 3.3B active per token
Qwen3-30B-A3B at 4-bit: 598.7 tokens a second for one conversation, 2.10 times the published RTX 5090 llama.cpp result (285.5). Measured 19 October 2026.
The model files you already use with llama.cpp run on a TPU, through our backend.
Model size: 6.74B parameters
Llama 2 7B at 4-bit through llama.cpp on TPU: 249.9 tokens a second, above the RTX 4090 (188.96) and A100 80GB (200.90) rows of llama.cpp's scoreboard. Measured 19 October 2026.
Xiaomi MiMo-V2.6-Flash served on four TPU v5p chips.
Model size: 309B parameters, 15B active per token
Xiaomi MiMo-V2.6-Flash: 180.4 tokens a second for one conversation, 1.22 times the fastest provider listed on Artificial Analysis (Makora, 147.8), with a 10,000-token prompt and 5.31 s to first token. Measured 22 October 2026.
Model code from other research labs, rewritten for our stack. 23 replaced so far.
Live video from EdenLive 5B by VAST, streamed from one TPU v6e chip.
Model size: 5B parameters
As of 23 October 2026: the same model, EdenLive 5B by VAST, built on Wan2.2, streaming at 832×480: 87.4 frames a second on one Google TPU v6e chip in our engine (87.38 and 87.67 in two runs), 1.19 times the 73.52 frames a second on one NVIDIA H100 in EdenLive’s published figure.
EdenLive 5B by VAST (built on Wan2.2) runs live at 1280x704 and 39.4 frames a second in our engine, with the first chunk in 256 ms. EdenLive's own report gives 29.8 frames a second on an NVIDIA H100. Measured 22 October 2026.
Wan 2.2 A14B video clips made on one TPU v6e chip.
A final-quality 81-frame Wan 2.2 A14B clip at 832x464 in 16 seconds. As of 21 October 2026.
Results for these are not published yet.
Send us the model with reference outputs from your current setup. Recut ports it to TPU, and it comes back as a Lamproite Pack with a Masterstone report graded against them.